Normal view MARC view ISBD view

VHDL : lenguaje para síntesis y modelado de circuitos / Fernando Pardo Carpio, José A. Boluda Grau.

By:

Contributor(s):

Material type: Text

TextPublication details: México : Alfaomega, 2000Description: 238 p. :ilISBN:

Subject(s):

DDC classification:

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Collection	Call number	Materials specified	Copy number	Status	Date due	Barcode
Libro	Biblioteca Legislativa	Acervo General	004.65 P2261v		1	Available		00-2113

Incluye CD ROM

There are no comments on this title.

to post a comment.